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Published On: July 18, 2017 09:32 AM NPT By: Republica

2nd All Nepal FPGA Design Competition 2017 concludes

2nd All Nepal FPGA Design Competition 2017 concludes

KATHMANDU: With the main objective of promoting and enhancing hardware design skills with a chip technology called Field Programmable Gate Array (FPGA), the ‘Second All Nepal FPGA Design Competition 2017’ has come to an end on Saturday at Kathford Int’l College of Engineering and Management, Balkumari, Lalitpur.

According to a press statement, the competition was jointly organized by Kathford Int’l College of Engineering and Management, National College of Engineering, Sagarmatha Engineering College, Kathmandu Engineering College and Digitronix Nepal
Pvt Ltd.    

The competition is the continuation of ‘First National FPGA Design Contest 2016’, which was held on July 2, 2016 at the Institute of Engineering (IOE) Pulchowk Campus.

FPGA is a programmable chips technology widely used in hardware systems such as mobile phones to applications in automotive, telecom and space missions. The FPGA technology is fast becoming one of the market leaders in hardware system design around the world.

The second edition of the competition hopes to lay the foundation of FPGA research in Nepal by enhancing FPGA application development skills and encouraging engineering students to do their projects on FPGA.

The winner of this contest, Rukesh Prajapati, a fourth year electronics engineering student from Khwopa Engineering College, with his project – “AES Encryption of data for secure wireless communication” was awarded a cash prize of Rs 16,000.

First runners-up, Ashutosh Karna, Aayush Shah and Shushma Pokharel from Thapathali Engineering Campus, and second runners-up, Rajan Kanu Baniya and Abhidan Jung Thapa from Nepal Engineering College, received Rs 8,000 and Rs 5,000, respectively.

The award winners will also get an opportunity to receive training on Xilinx Zynq FPGA development board and Internship on FPGA research and development at Digitronix Nepal.

Advisor of the event Deepesh Man Shakya, a Xilinx FPGA Engineer, said the second FPGA Design Competition is a major milestone in enhancing FPGA education and skills in Nepal, and providing a platform for creating FPGA based research and development centers.

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